mirror of
https://github.com/MCKero6423/uv-k5-v3-emulator.git
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mckero
c0a09827ed
Adds a QEMU machine for the Puya PY32F071 (Cortex-M0+) so Quansheng UV-K5 V3 firmware can run on a PC. The firmware boots to its main loop in about five seconds and the LCD contents are readable. Register layouts come from the vendor CMSIS header shipped with the firmware rather than guesswork. Modelled: RCC, GPIO, ADC, both SPI controllers, DMA1 and the PY25Q16 flash; everything else answers through a logging catch-all, which is how the next thing worth modelling gets identified. Seven things had to be right before it would boot, each found by watching where the firmware stopped: flash aliased at the application offset, clock ready bits, self-clearing ADC calibration, SPI transfer flags, DMA-driven flash reads, SysTick poll acceleration, and the bit-banged transceiver bus idling low. SysTick needs explanation. SYSTICK_DelayUs polls the counter and accumulates differences; under emulation a register read costs far more relative to guest time, so a measured 120 ms delay would have taken about 7.7 hours. Lowering the clock does not help because the bottleneck is loop iterations, not counter speed. Reporting a value that runs ahead of the real counter does, via a new poll-boost property on SysTick. Guest time therefore runs fast during delays: fine for exercising menus and control flow, wrong for judging signal timing. Also includes the host build of the CW timing chain (harness, stubs, shim, tests), which compiles app/cwkeyer.c and app/cwmacro.c unmodified against stub drivers with a virtual clock and scripted paddle input. Known gap: keypad rows reach the firmware's scan and KEYBOARD_Poll returns the right key code, but the UI does not react yet. Not modelled, and not intended to be: radio behaviour. The transceiver chip has no public datasheet, so keying envelopes and emissions need real hardware.
109 lines
3.0 KiB
C
109 lines
3.0 KiB
C
/* Driver-layer replacements for the host build.
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*
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* Everything the CW timing chain reaches outside its own two files. The count is
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* small on purpose: app/cwkeyer.c and app/cwmacro.c contain no register access,
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* so this is the whole seam.
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*
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* Time comes from the virtual clock, not the host clock. That is what makes the
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* tests deterministic and fast.
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*/
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#include <stdbool.h>
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#include <stdint.h>
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#include <stdio.h>
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#include <string.h>
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#include "harness/sim_clock.h"
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#include "harness/sim_paddle.h"
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#include "harness/sim_record.h"
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// ---------------------------------------------------------------- timing
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uint32_t millis(void)
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{
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return SIM_ClockNow();
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}
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uint32_t millis_since(uint32_t start)
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{
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// Same unsigned wrap arithmetic as the firmware.
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return SIM_ClockNow() - start;
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}
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void SYSTEM_DelayMs(uint32_t ms)
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{
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// The firmware blocks here, so the keyer is not polled: advance the clock
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// without running ticks. Modelling this faithfully matters -- the startup
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// stuck-key check delays 50 ms and must not see paddle activity.
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SIM_ClockAdvanceRaw(ms);
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}
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// ---------------------------------------------------------------- inputs
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bool GPIO_IsPttPressed(void)
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{
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// PTT is the dit paddle in Buttons mode and the straight key in handkey
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// modes, so it reads from the same scripted timeline as TIP.
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return (SIM_PaddleState() & SIM_CONTACT_TIP) != 0;
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}
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// ---------------------------------------------------------------- recorded
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bool AUDIO_IsAudioPathOn(void)
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{
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// The keyer adds a settling delay when the audio path was off. Report it as
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// already on so element timing is not skewed by that one-shot allowance;
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// tests that care drive it explicitly through the recorder.
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return true;
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}
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void BACKLIGHT_TurnOn(void) { }
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void UART_Send(const void *data, unsigned int size)
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{
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// Debug tracing only (CW_KEYER_DEBUG). Route it to the recorder so a test
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// can assert on it, and to stderr when verbose.
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SIM_RecordDebug((const char *)data, size);
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}
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// ---------------------------------------------------------------- storage
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#define SIM_EEPROM_SIZE 0x2000
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static uint8_t s_eeprom[SIM_EEPROM_SIZE];
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static bool s_eeprom_ready;
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static void eeprom_init_once(void)
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{
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if (!s_eeprom_ready) {
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// Erased flash reads as 0xFF; the firmware's validity checks depend on
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// that, so start from it rather than zeros.
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memset(s_eeprom, 0xFF, sizeof(s_eeprom));
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s_eeprom_ready = true;
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}
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}
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void EEPROM_ReadBuffer(uint16_t address, void *buffer, uint8_t size)
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{
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eeprom_init_once();
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if ((uint32_t)address + size > SIM_EEPROM_SIZE) {
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memset(buffer, 0xFF, size);
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return;
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}
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memcpy(buffer, s_eeprom + address, size);
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}
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void EEPROM_WriteBuffer(uint16_t address, const void *buffer)
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{
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// The firmware always writes 8 bytes through this entry point.
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eeprom_init_once();
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if ((uint32_t)address + 8 > SIM_EEPROM_SIZE)
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return;
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memcpy(s_eeprom + address, buffer, 8);
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}
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void SIM_EepromReset(void)
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{
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s_eeprom_ready = false;
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eeprom_init_once();
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}
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