mirror of
https://github.com/MCKero6423/uv-k5-v3-emulator.git
synced 2026-10-02 03:15:36 +00:00
mckero
c0a09827ed
Adds a QEMU machine for the Puya PY32F071 (Cortex-M0+) so Quansheng UV-K5 V3 firmware can run on a PC. The firmware boots to its main loop in about five seconds and the LCD contents are readable. Register layouts come from the vendor CMSIS header shipped with the firmware rather than guesswork. Modelled: RCC, GPIO, ADC, both SPI controllers, DMA1 and the PY25Q16 flash; everything else answers through a logging catch-all, which is how the next thing worth modelling gets identified. Seven things had to be right before it would boot, each found by watching where the firmware stopped: flash aliased at the application offset, clock ready bits, self-clearing ADC calibration, SPI transfer flags, DMA-driven flash reads, SysTick poll acceleration, and the bit-banged transceiver bus idling low. SysTick needs explanation. SYSTICK_DelayUs polls the counter and accumulates differences; under emulation a register read costs far more relative to guest time, so a measured 120 ms delay would have taken about 7.7 hours. Lowering the clock does not help because the bottleneck is loop iterations, not counter speed. Reporting a value that runs ahead of the real counter does, via a new poll-boost property on SysTick. Guest time therefore runs fast during delays: fine for exercising menus and control flow, wrong for judging signal timing. Also includes the host build of the CW timing chain (harness, stubs, shim, tests), which compiles app/cwkeyer.c and app/cwmacro.c unmodified against stub drivers with a virtual clock and scripted paddle input. Known gap: keypad rows reach the firmware's scan and KEYBOARD_Poll returns the right key code, but the UI does not react yet. Not modelled, and not intended to be: radio behaviour. The transceiver chip has no public datasheet, so keying envelopes and emissions need real hardware.
54 lines
1.9 KiB
C
54 lines
1.9 KiB
C
/* Hardware seam for the CW timing chain.
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*
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* Only the lowest layer is replaced: CW_ReadKeysForMode (raw pin state) and the
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* pin-configuration calls. The debounce and edge detection in CW_ReadKeys stay
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* compiled from the real app/cwhardware.c, because that debounce is part of the
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* timing behaviour under test -- reimplementing it here would test the
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* reimplementation instead of the firmware.
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*/
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#include <stdbool.h>
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#include <stdint.h>
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#include "app/cwhardware.h"
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#include "harness/sim_paddle.h"
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#include "settings.h"
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// Mirrors the flag layout in settings.h.
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#define CW_KEY_FLAG_REVERSED 0x01
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#define CW_KEY_FLAG_PORT_RING 0x02
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#define CW_KEY_FLAG_SIDE1 0x04
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#define CW_KEY_FLAG_NO_KEYER 0x08
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#define CW_KEY_FLAG_PORT_GROUND 0x10
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#define CW_KEY_FLAG_USB_PORT 0x20
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bool CW_ReadKeysForMode(uint8_t mode, bool *dit_out, bool *dah_out)
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{
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// Same early-out as the real driver: handkey families have no timing
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// engine, so the iambic path must not see paddle state from them.
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if ((mode & CW_KEY_FLAG_NO_KEYER) && !(mode & CW_KEY_FLAG_PORT_GROUND)) {
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return false;
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}
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const uint32_t contacts = SIM_PaddleState();
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const bool hw_tip = (contacts & SIM_CONTACT_TIP) != 0;
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const bool hw_ring = (contacts & SIM_CONTACT_RING) != 0;
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const bool reverse = (mode & CW_KEY_FLAG_REVERSED) != 0;
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*dit_out = reverse ? hw_ring : hw_tip;
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*dah_out = reverse ? hw_tip : hw_ring;
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return true;
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}
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void CW_ReadUSBPaddleRaw(bool *tip_out, bool *ring_out)
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{
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const uint32_t contacts = SIM_PaddleState();
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*tip_out = (contacts & SIM_CONTACT_TIP) != 0;
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*ring_out = (contacts & SIM_CONTACT_RING) != 0;
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}
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// Pin plumbing has no meaning off-target.
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void CW_ConfigurePortGround(bool enable) { (void)enable; }
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void CW_ConfigurePortRing(bool enable) { (void)enable; }
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void CW_ConfigureUsbPaddlePins(bool enable) { (void)enable; }
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