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diff --git a/fw-pack.py b/fw-pack.py
deleted file mode 100644
index 4200248f..00000000
--- a/fw-pack.py
+++ /dev/null
@@ -1,39 +0,0 @@
-#!/usr/bin/env python3
-
-import crcmod
-import sys
-
-from itertools import cycle
-from binascii import hexlify
-
-OBFUSCATION = [
-        0x47, 0x22, 0xC0, 0x52, 0x5D, 0x57, 0x48, 0x94, 0xB1, 0x60, 0x60, 0xDB, 0x6F, 0xE3, 0x4C, 0x7C,
-        0xD8, 0x4A, 0xD6, 0x8B, 0x30, 0xEC, 0x25, 0xE0, 0x4C, 0xD9, 0x00, 0x7F, 0xBF, 0xE3, 0x54, 0x05,
-        0xE9, 0x3A, 0x97, 0x6B, 0xB0, 0x6E, 0x0C, 0xFB, 0xB1, 0x1A, 0xE2, 0xC9, 0xC1, 0x56, 0x47, 0xE9,
-        0xBA, 0xF1, 0x42, 0xB6, 0x67, 0x5F, 0x0F, 0x96, 0xF7, 0xC9, 0x3C, 0x84, 0x1B, 0x26, 0xE1, 0x4E,
-        0x3B, 0x6F, 0x66, 0xE6, 0xA0, 0x6A, 0xB0, 0xBF, 0xC6, 0xA5, 0x70, 0x3A, 0xBA, 0x18, 0x9E, 0x27,
-        0x1A, 0x53, 0x5B, 0x71, 0xB1, 0x94, 0x1E, 0x18, 0xF2, 0xD6, 0x81, 0x02, 0x22, 0xFD, 0x5A, 0x28,
-        0x91, 0xDB, 0xBA, 0x5D, 0x64, 0xC6, 0xFE, 0x86, 0x83, 0x9C, 0x50, 0x1C, 0x73, 0x03, 0x11, 0xD6,
-        0xAF, 0x30, 0xF4, 0x2C, 0x77, 0xB2, 0x7D, 0xBB, 0x3F, 0x29, 0x28, 0x57, 0x22, 0xD6, 0x92, 0x8B,
-    ]
-
-def obfuscate(fw):
-    return bytes([a^b for a, b in zip(fw, cycle(OBFUSCATION))])
-
-plain = open(sys.argv[1], 'rb').read()
-
-version = b'*' + bytes(sys.argv[2], 'ascii') + b' ' + bytes(sys.argv[3], 'ascii')
-version = version[0:16]
-
-if len(version) < 16:
-    version += b'\x00' * (16 - len(version))
-
-packed = obfuscate(plain[:0x2000] + version + plain[0x2000:])
-
-crc = crcmod.predefined.Crc('xmodem')
-crc.update(packed)
-digest = crc.digest()
-digest = bytes([digest[1], digest[0]])
-
-open(sys.argv[4], 'wb').write(packed + digest)
-
diff --git a/hardware/dp32g030/aes.def b/hardware/dp32g030/aes.def
deleted file mode 100644
index 6541166d..00000000
--- a/hardware/dp32g030/aes.def
+++ /dev/null
@@ -1,49 +0,0 @@
-# Copyright 2023 Dual Tachyon
-# https://github.com/DualTachyon
-#
-# Licensed under the Apache License, Version 2.0 (the "License");
-# you may not use this file except in compliance with the License.
-# You may obtain a copy of the License at
-#
-#     http://www.apache.org/licenses/LICENSE-2.0
-#
-# Unless required by applicable law or agreed to in writing, software
-# distributed under the License is distributed on an "AS IS" BASIS,
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-# See the License for the specific language governing permissions and
-# limitations under the License.
-
-[AES]
-@ = 0x400BD000, 0x800
-
-CR = 0x0000
-> CCFC, 7, 1
-= SET, 1
-
-> CHMOD, 5, 2
-= ECB, 0
-= CBC, 1
-= CTR, 2
-
-> EN, 0, 1
-= DISABLE, 0
-= ENABLE, 1
-
-SR = 0x0004
-> CCF, 0, 1
-= NOT_COMPLETE, 0
-= COMPLETE, 1
-
-DINR = 0x0008
-DOUTR = 0x000C
-
-KEYR0 = 0x0010
-KEYR1 = 0x0014
-KEYR2 = 0x0018
-KEYR3 = 0x001C
-
-IVR0 = 0x0020
-IVR1 = 0x0024
-IVR2 = 0x0028
-IVR3 = 0x002C
-
diff --git a/hardware/dp32g030/crc.def b/hardware/dp32g030/crc.def
deleted file mode 100644
index c7398e69..00000000
--- a/hardware/dp32g030/crc.def
+++ /dev/null
@@ -1,58 +0,0 @@
-# Copyright 2023 Dual Tachyon
-# https://github.com/DualTachyon
-#
-# Licensed under the Apache License, Version 2.0 (the "License");
-# you may not use this file except in compliance with the License.
-# You may obtain a copy of the License at
-#
-#     http://www.apache.org/licenses/LICENSE-2.0
-#
-# Unless required by applicable law or agreed to in writing, software
-# distributed under the License is distributed on an "AS IS" BASIS,
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-# See the License for the specific language governing permissions and
-# limitations under the License.
-
-[CRC]
-@ = 0x40003000, 0x800
-
-CR = 0x0000
-> CRC_EN, 0, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> INPUT_REV, 1, 1
-= NORMAL, 0
-= REVERSED, 1
-
-> INPUT_INV, 2, 2
-= NORMAL, 0
-= BIT_INVERTED, 1
-= BYTE_INVERTED, 2
-= BIT_BYTE_INVERTED, 3
-
-> OUTPUT_REV, 4, 1
-= NORMAL, 0
-= REVERSED, 1
-
-> OUTPUT_INV, 5, 2
-= NORMAL, 0
-= BIT_INVERTED, 1
-= BYTE_INVERTED, 2
-= BIT_BYTE_INVERTED, 3
-
-> DATA_WIDTH, 7, 2
-= 32, 0
-= 16, 1
-= 8, 2
-
-> CRC_SEL, 9, 2
-= CRC_16_CCITT, 0
-= CRC_8_ATM, 1
-= CRC_16, 2
-= CRC_32_IEEE802_3, 3
-
-IV = 0x0004
-DATAIN = 0x0008
-DATAOUT = 0x000C
-
diff --git a/hardware/dp32g030/dma.def b/hardware/dp32g030/dma.def
deleted file mode 100644
index 6cae9e15..00000000
--- a/hardware/dp32g030/dma.def
+++ /dev/null
@@ -1,169 +0,0 @@
-# Copyright 2023 Dual Tachyon
-# https://github.com/DualTachyon
-#
-# Licensed under the Apache License, Version 2.0 (the "License");
-# you may not use this file except in compliance with the License.
-# You may obtain a copy of the License at
-#
-#     http://www.apache.org/licenses/LICENSE-2.0
-#
-# Unless required by applicable law or agreed to in writing, software
-# distributed under the License is distributed on an "AS IS" BASIS,
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-# See the License for the specific language governing permissions and
-# limitations under the License.
-
-[DMA]
-@ = 0x40001000, 0x100
-
-CTR = 0x0000
-> DMAEN, 0, 1
-= DISABLE, 0
-= ENABLE, 1
-
-INTEN = 0x0004
-> CH0_TC_INTEN, 0, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> CH1_TC_INTEN, 1, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> CH2_TC_INTEN, 2, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> CH3_TC_INTEN, 3, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> CH0_THC_INTEN, 8, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> CH1_THC_INTEN, 9, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> CH2_THC_INTEN, 10, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> CH3_THC_INTEN, 11, 1
-= DISABLE, 0
-= ENABLE, 1
-
-INTST = 0x0008
-> CH0_TC_INTST, 0, 1
-= NOT_SET, 0
-= SET, 1
-
-> CH1_TC_INTST, 1, 1
-= NOT_SET, 0
-= SET, 1
-
-> CH2_TC_INTST, 2, 1
-= NOT_SET, 0
-= SET, 1
-
-> CH3_TC_INTST, 3, 1
-= NOT_SET, 0
-= SET, 1
-
-> CH0_THC_INTST, 8, 1
-= NOT_SET, 0
-= SET, 1
-
-> CH1_THC_INTST, 9, 1
-= NOT_SET, 0
-= SET, 1
-
-> CH2_THC_INTST, 10, 1
-= NOT_SET, 0
-= SET, 1
-
-> CH3_THC_INTST, 11, 1
-= NOT_SET, 0
-= SET, 1
-
-[DMA_CH]
-$ = DMA_Channel_t
-
-CTR = 0x0000
-> CH_EN, 0, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> LENGTH, 1, 12
-
-> LOOP, 13, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> PRI, 14, 2
-= LOW, 0
-= MEDIUM, 1
-= HIGH, 2
-= HIGHEST, 3
-
-> SWREQ, 16, 1
-= SET, 1
-
-MOD = 0x0004
-> MS_ADDMOD, 0, 1
-= NONE, 0
-= INCREMENT, 1
-
-> MS_SIZE, 1, 2
-= 8BIT, 0
-= 16BIT, 1
-= 32BIT, 2
-= KEEP, 3
-
-> MS_SEL, 3, 3
-= SRAM, 0
-= HSREQ_MS0, 1
-= HSREQ_MS1, 2
-= HSREQ_MS2, 3
-= HSREQ_MS3, 4
-= HSREQ_MS4, 5
-= HSREQ_MS5, 6
-= HSREQ_MS6, 7
-
-> MD_ADDMOD, 8, 1
-= NONE, 0
-= INCREMENT, 1
-
-> MD_SIZE, 9, 2
-= 8BIT, 0
-= 16BIT, 1
-= 32BIT, 2
-= KEEP, 3
-
-> MD_SEL, 11, 3
-= SRAM, 0
-= HSREQ_MS0, 1
-= HSREQ_MS1, 2
-= HSREQ_MS2, 3
-= HSREQ_MS3, 4
-= HSREQ_MS4, 5
-= HSREQ_MS5, 6
-= HSREQ_MS6, 7
-
-MSADDR = 0x0008
-MDADDR = 0x000C
-ST = 0x0010
-
-[DMA_CH0]
-@ = 0x40001100, 0x20, $DMA_CH
-
-[DMA_CH1]
-@ = 0x40001120, 0x20, $DMA_CH
-
-[DMA_CH2]
-@ = 0x40001140, 0x20, $DMA_CH
-
-[DMA_CH3]
-@ = 0x40001160, 0x20, $DMA_CH
-
diff --git a/hardware/dp32g030/flash.def b/hardware/dp32g030/flash.def
deleted file mode 100644
index ecfa47c9..00000000
--- a/hardware/dp32g030/flash.def
+++ /dev/null
@@ -1,85 +0,0 @@
-# Copyright 2023 Dual Tachyon
-# https://github.com/DualTachyon
-#
-# Licensed under the Apache License, Version 2.0 (the "License");
-# you may not use this file except in compliance with the License.
-# You may obtain a copy of the License at
-#
-#     http://www.apache.org/licenses/LICENSE-2.0
-#
-# Unless required by applicable law or agreed to in writing, software
-# distributed under the License is distributed on an "AS IS" BASIS,
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-# See the License for the specific language governing permissions and
-# limitations under the License.
-
-[FLASH]
-@ = 0x4006F000, 0x800
-
-CFG = 0x0000
-> READ_MD, 0, 1
-= 1_CYCLE, 0
-= 2_CYCLE, 1
-
-> NVR_SEL, 1, 1
-= MAIN, 0
-= NVR, 1
-
-> MODE, 2, 3
-= READ_AHB, 0
-= PROGRAM, 1
-= ERASE, 2
-= READ_APB, 5
-
-> DEEP_PD, 31, 1
-= NORMAL, 0
-= LOW_POWER, 1
-
-ADDR = 0x0004
-WDATA = 0x0008
-RDATA = 0x000C
-
-START = 0x0010
-> START, 0, 1
-= START, 1
-
-ST = 0x0014
-> INIT_BUSY, 0, 1
-= COMPLETE, 0
-= BUSY, 1
-
-> BUSY, 1, 1
-= READY, 0
-= BUSY, 1
-
-> PROG_BUF_EMPTY, 2, 1
-= NOT_EMPTY, 0
-= EMPTY, 1
-
-LOCK = 0x0018
-> LOCK, 0, 8
-= LOCK, 0x55
-
-UNLOCK = 0x001C
-> UNLOCK, 0, 8
-= UNLOCK, 0xAA
-
-MASK = 0x0020
-> SEL, 0, 2
-= NONE, 0
-= 2KB, 1
-= 4KB, 2
-= 8KB, 3
-
-> LOCK, 2, 1
-= NOT_SET, 0
-= SET, 1
-
-ERASETIME = 0x0024
-> TERASE, 0, 19
-> TRCV, 19, 12
-
-PROGTIME = 0x0028
-> TPROG, 0, 11
-> TPGS, 11, 11
-
diff --git a/hardware/dp32g030/gpio.def b/hardware/dp32g030/gpio.def
deleted file mode 100644
index d1bc4790..00000000
--- a/hardware/dp32g030/gpio.def
+++ /dev/null
@@ -1,93 +0,0 @@
-# Copyright 2023 Dual Tachyon
-# https://github.com/DualTachyon
-#
-# Licensed under the Apache License, Version 2.0 (the "License");
-# you may not use this file except in compliance with the License.
-# You may obtain a copy of the License at
-#
-#     http://www.apache.org/licenses/LICENSE-2.0
-#
-# Unless required by applicable law or agreed to in writing, software
-# distributed under the License is distributed on an "AS IS" BASIS,
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-# See the License for the specific language governing permissions and
-# limitations under the License.
-
-[GPIO]
-$ = GPIO_Bank_t
-
-DATA = 0x0000
-DIR = 0x0004
-> 0, 0, 1
-= INPUT, 0
-= OUTPUT, 1
-
-> 1, 1, 1
-= INPUT, 0
-= OUTPUT, 1
-
-> 2, 2, 1
-= INPUT, 0
-= OUTPUT, 1
-
-> 3, 3, 1
-= INPUT, 0
-= OUTPUT, 1
-
-> 4, 4, 1
-= INPUT, 0
-= OUTPUT, 1
-
-> 5, 5, 1
-= INPUT, 0
-= OUTPUT, 1
-
-> 6, 6, 1
-= INPUT, 0
-= OUTPUT, 1
-
-> 7, 7, 1
-= INPUT, 0
-= OUTPUT, 1
-
-> 8, 8, 1
-= INPUT, 0
-= OUTPUT, 1
-
-> 9, 9, 1
-= INPUT, 0
-= OUTPUT, 1
-
-> 10, 10, 1
-= INPUT, 0
-= OUTPUT, 1
-
-> 11, 11, 1
-= INPUT, 0
-= OUTPUT, 1
-
-> 12, 12, 1
-= INPUT, 0
-= OUTPUT, 1
-
-> 13, 13, 1
-= INPUT, 0
-= OUTPUT, 1
-
-> 14, 14, 1
-= INPUT, 0
-= OUTPUT, 1
-
-> 15, 15, 1
-= INPUT, 0
-= OUTPUT, 1
-
-[GPIOA]
-@ = 0x40060000, 0x800, $GPIO
-
-[GPIOB]
-@ = 0x40060800, 0x800, $GPIO
-
-[GPIOC]
-@ = 0x40061000, 0x800, $GPIO
-
diff --git a/hardware/dp32g030/pmu.def b/hardware/dp32g030/pmu.def
deleted file mode 100644
index b9237801..00000000
--- a/hardware/dp32g030/pmu.def
+++ /dev/null
@@ -1,37 +0,0 @@
-# Copyright 2023 Dual Tachyon
-# https://github.com/DualTachyon
-#
-# Licensed under the Apache License, Version 2.0 (the "License");
-# you may not use this file except in compliance with the License.
-# You may obtain a copy of the License at
-#
-#     http://www.apache.org/licenses/LICENSE-2.0
-#
-# Unless required by applicable law or agreed to in writing, software
-# distributed under the License is distributed on an "AS IS" BASIS,
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-# See the License for the specific language governing permissions and
-# limitations under the License.
-
-[PMU]
-@ = 0x40000800, 0x800
-
-SRC_CFG = 0x0010
-> RCHF_SEL, 1, 1
-= 48MHZ, 0
-= 24MHZ, 1
-
-> RCHF_EN, 0, 1
-= DISABLE, 0
-= ENABLE, 1
-
-TRIM_POW0 = 0x0020
-TRIM_POW1 = 0x0024
-TRIM_POW2 = 0x0028
-TRIM_POW3 = 0x002C
-
-TRIM_RCHF = 0x0030
-TRIM_RCLF = 0x0034
-TRIM_OPA = 0x0038
-TRIM_PLL = 0x003C
-
diff --git a/hardware/dp32g030/portcon.def b/hardware/dp32g030/portcon.def
deleted file mode 100644
index a8f3dbc1..00000000
--- a/hardware/dp32g030/portcon.def
+++ /dev/null
@@ -1,1090 +0,0 @@
-# Copyright 2023 Dual Tachyon
-# https://github.com/DualTachyon
-#
-# Licensed under the Apache License, Version 2.0 (the "License");
-# you may not use this file except in compliance with the License.
-# You may obtain a copy of the License at
-#
-#     http://www.apache.org/licenses/LICENSE-2.0
-#
-# Unless required by applicable law or agreed to in writing, software
-# distributed under the License is distributed on an "AS IS" BASIS,
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-# See the License for the specific language governing permissions and
-# limitations under the License.
-
-[PORTCON]
-@ = 0x400B0000, 0x800
-
-PORTA_SEL0 = 0x0000
-> A0, 0, 4
-= GPIOA0, 0
-= PWMP1_PLUS0, 1
-= PWMP0_PLUS1, 2
-= TM, 3
-= WAKEUP0, 4
-
-> A1, 4, 4
-= GPIOA1, 0
-= XTAL_XI, 1
-
-> A2, 8, 4
-= GPIOA2, 0
-= XTAL_XO, 1
-
-> A3, 12, 4
-= GPIOA3, 0
-= CMP0_VN, 1
-= XTAH_XI, 2
-
-> A4, 16, 4
-= GPIOA4, 0
-= CMP0_VP, 1
-= XTAH_XO, 2
-
-> A5, 20, 4
-= GPIOA5, 0
-= UART1_CTS, 1
-= PWMP1_PLUS1, 2
-= TIMERP1_IN0, 3
-= TIMERP1_OUT_L, 4
-= WAKEUP1, 5
-= SARADC_CH1, 6
-
-> A6, 24, 4
-= GPIOA6, 0
-= UART1_RTS, 1
-= TIMERP1_IN1, 2
-= TIMERP1_OUT_H, 3
-= SARADC_CH1, 4
-= OPA0_OUT, 5
-
-> A7, 28, 4
-= GPIOA7, 0
-= UART1_TX, 1
-= TIMERP0_IN0, 2
-= TIMERP0_OUT_L, 3
-= SARADC_CH2, 4
-= OPA0_VP, 5
-
-PORTA_SEL1  = 0x0004
-> A8, 0, 4
-= GPIOA8, 0
-= UART1_RX, 1
-= TIMERP0_IN1, 2
-= TIMERP0_OUT_H, 3
-= SARADC_CH3, 4
-= OPA0_VN, 5
-
-> A9, 4, 4
-= GPIOA9, 0
-= SPI0_SSN, 1
-= TIMERP1_IN0, 2
-= TIMERP1_OUT_L, 3
-= TM, 4
-= SARADC_CH4, 5
-= CMP1_VN, 6
-
-> A10, 8, 4
-= GPIOA10, 0
-= SPI0_CLK, 1
-= SARADC_CH5, 2
-= CMP1_VP, 3
-
-> A11, 12, 4
-= GPIOA11, 0
-= SPI0_MISO, 1
-= PWMB0_CH0, 2
-= PWMP0_BRAKE0, 3
-= TIMERP1_IN1, 4
-= TIMERP1_OUT_H, 5
-= SARADC_CH6, 6
-
-> A12, 16, 4
-= GPIOA12, 0
-= SPI0_MOSI, 1
-= PWMB0_CH1, 2
-= PWMP0_CH0N, 3
-= TIMERP0_IN0, 4
-= TIMERP0_OUT_L, 5
-= SARADC_CH7, 6
-
-> A13, 20, 4
-= GPIOA13, 0
-= PWMB0_CH2, 1
-= PWMP0_CH1N, 2
-= TIMERP0_IN1, 3
-= TIMERP0_OUT_H, 4
-= SARADC_CH8, 5
-
-> A14, 24, 4
-= GPIOA14, 0
-= PWMB1_CH0, 1
-= PWMP0_CH2N, 2
-= TIMERP1_IN0, 3
-= TIMERP1_OUT_L, 4
-= SARADC_CH9, 5
-
-> A15, 28, 4
-= GPIOA15, 0
-= PWMB1_CH1, 1
-= PWMP0_CH0, 2
-= TIMERP1_IN1, 3
-= TIMERP1_OUT_H, 4
-
-PORTB_SEL0 = 0x0008
-> B0, 0, 4
-= GPIOB0, 0
-= UART2_TX, 1
-= IIC0_SCL, 2
-= PWMB1_CH2, 3
-= PWMP0_CH1, 4
-
-> B1, 4, 4
-= GPIOB1, 0
-= UART2_RX, 1
-= IIC0_SDA, 2
-= PWMP0_CH2, 3
-
-> B2, 8, 4
-= GPIOB2, 0
-= SPI1_SSN, 1
-= PWMP0_BRAKE1, 2
-= TIMERP1_HALL0, 3
-
-> B3, 12, 4
-= GPIOB3, 0
-= SPI1_CLK, 1
-= IIC1_SDA, 2
-= PWMP0_CH0N, 3
-= TIMERP1_HALL1, 4
-
-> B4, 16, 4
-= GPIOB4, 0
-= SPI1_MISO, 1
-= IIC1_SCL, 2
-= PWMP1_CH0, 3
-= PWMP0_CH1N, 4
-= TIMERP1_HALL2, 5
-
-> B5, 20, 4
-= GPIOB5, 0
-= SPI1_MOSI, 1
-= PWMP1_CH0N, 2
-= PWMP0_CH2N, 3
-= TIMERP0_IN0, 4
-= TIMERP0_OUT_L, 5
-
-> B6, 24, 4
-= GPIOB6, 0
-= PWMP0_CH0, 1
-= TIMERP0_IN1, 2
-= TIMERP0_OUT_H, 3
-
-> B7, 28, 4
-= GPIOB7, 0
-= SPI0_SSN, 1
-= UART0_TX, 2
-= IIC0_SCL, 3
-= PWMP1_BRAKE0, 4
-= PWMP0_CH1, 5
-
-PORTB_SEL1 = 0x000C
-> B8, 0, 4
-= GPIOB8, 0
-= SPI0_CLK, 1
-= UART0_RX, 2
-= IIC0_SDA, 3
-= PWMB0_CH0, 4
-= PWMP1_BRAKE1, 5
-= PWMP0_CH2, 6
-
-> B9, 4, 4
-= GPIOB9, 0
-= SPI0_MISO, 1
-= UART0_CTS, 2
-= PWMB0_CH1, 3
-= PWMP1_CH0, 4
-= TIMERP1_IN1, 5
-= TIMERP1_OUT_H, 6
-
-> B10, 8, 4
-= GPIOB10, 0
-= SPI0_MOSI, 1
-= UART0_RTS, 2
-= PWMB0_CH2, 3
-= PWMP1_CH1, 4
-= PWMP0_PLUS0, 5
-= TIMERP1_IN0, 6
-= TIMERP1_OUT_L, 7
-
-> B11, 12, 4
-= GPIOB11, 0
-= SWDIO, 1
-= PWMP1_CH2, 2
-= PWMP0_BRAKE2, 3
-
-> B12, 16, 4
-= GPIOB12, 0
-= UART1_TX, 1
-= IIC1_SCL, 2
-= PWMP1_CH0N, 3
-
-> B13, 20, 4
-= GPIOB13, 0
-= UART1_RX, 1
-= IIC1_SDA, 2
-= PWMP1_CH1N, 3
-
-> B14, 24, 4
-= GPIOB14, 0
-= SWCLK, 1
-= UART2_TX, 2
-= PWMP1_CH2N, 3
-
-> B15, 28, 4
-= GPIOB15, 0
-= SPI1_SSN, 1
-= UART2_RX, 2
-
-PORTC_SEL0 = 0x0010
-> C0, 0, 4
-= GPIOC0, 0
-= SPI1_CLK, 1
-= UART2_CTS, 2
-= PWMB1_CH0, 3
-
-> C1, 4, 4
-= GPIOC1, 0
-= SPI1_MISO, 1
-= UART2_RTS, 2
-= PWMB1_CH1, 3
-= TIMERP0_IN0, 4
-= TIMERP0_OUT_L, 5
-
-> C2, 8, 4
-= GPIOC2, 0
-= SPI1_MOSI, 1
-= PWMB1_CH2, 2
-= PWMP1_BRAKE2, 3
-= TIMERP0_IN1, 4
-= TIMERP0_OUT_H, 5
-
-> C3, 12, 4
-= GPIOC3, 0
-= UART0_TX, 1
-= IIC0_SCL, 2
-= PWMP1_CH1N, 3
-= TIMERP0_HALL0, 4
-= CMP2_VN, 5
-
-> C4, 16, 4
-= GPIOC4, 0
-= UART0_RX, 1
-= IIC0_SDA, 2
-= PWMP1_CH2N, 3
-= TIMERP0_HALL1, 4
-= CMP2_VP, 5
-
-> C5, 20, 4
-= GPIOC5, 0
-= TIMERP0_HALL2, 1
-= TM, 2
-= OPA1_VP, 3
-
-> C6, 24, 4
-= GPIOC6, 0
-= IIC1_SCL, 1
-= PWMP1_CH1, 2
-= TIMERP1_IN1, 3
-= TIMERP1_OUT_H, 4
-= OPA1_VN, 5
-
-> C7, 28, 4
-= GPIOC7, 0
-= IIC1_SDA, 1
-= PWMP1_CH2, 2
-= TIMERP1_IN0, 3
-= TIMERP1_OUT_L, 4
-= OPA1_OUT, 5
-
-PORTA_IE = 0x0100
-> A0, 0, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> A1, 1, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> A2, 2, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> A3, 3, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> A4, 4, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> A5, 5, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> A6, 6, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> A7, 7, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> A8, 8, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> A9, 9, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> A10, 10, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> A11, 11, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> A12, 12, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> A13, 13, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> A14, 14, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> A15, 15, 1
-= DISABLE, 0
-= ENABLE, 1
-
-PORTB_IE = 0x0104
-> B0, 0, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> B1, 1, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> B2, 2, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> B3, 3, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> B4, 4, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> B5, 5, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> B6, 6, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> B7, 7, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> B8, 8, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> B9, 9, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> B10, 10, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> B11, 11, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> B12, 12, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> B13, 13, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> B14, 14, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> B15, 15, 1
-= DISABLE, 0
-= ENABLE, 1
-
-PORTC_IE = 0x0108
-> C0, 0, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> C1, 1, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> C2, 2, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> C3, 3, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> C4, 4, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> C5, 5, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> C6, 6, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> C7, 7, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> C8, 8, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> C9, 9, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> C10, 10, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> C11, 11, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> C12, 12, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> C13, 13, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> C14, 14, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> C15, 15, 1
-= DISABLE, 0
-= ENABLE, 1
-
-PORTA_PU = 0x0200
-> A0, 0, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> A1, 1, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> A2, 2, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> A3, 3, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> A4, 4, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> A5, 5, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> A6, 6, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> A7, 7, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> A8, 8, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> A9, 9, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> A10, 10, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> A11, 11, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> A12, 12, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> A13, 13, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> A14, 14, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> A15, 15, 1
-= DISABLE, 0
-= ENABLE, 1
-
-PORTB_PU = 0x0204
-> B0, 0, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> B1, 1, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> B2, 2, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> B3, 3, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> B4, 4, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> B5, 5, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> B6, 6, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> B7, 7, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> B8, 8, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> B9, 9, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> B10, 10, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> B11, 11, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> B12, 12, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> B13, 13, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> B14, 14, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> B15, 15, 1
-= DISABLE, 0
-= ENABLE, 1
-
-PORTC_PU = 0x0208
-> C0, 0, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> C1, 1, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> C2, 2, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> C3, 3, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> C4, 4, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> C5, 5, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> C6, 6, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> C7, 7, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> C8, 8, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> C9, 9, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> C10, 10, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> C11, 11, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> C12, 12, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> C13, 13, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> C14, 14, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> C15, 15, 1
-= DISABLE, 0
-= ENABLE, 1
-
-PORTA_PD = 0x0300
-> A0, 0, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> A1, 1, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> A2, 2, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> A3, 3, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> A4, 4, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> A5, 5, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> A6, 6, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> A7, 7, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> A8, 8, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> A9, 9, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> A10, 10, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> A11, 11, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> A12, 12, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> A13, 13, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> A14, 14, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> A15, 15, 1
-= DISABLE, 0
-= ENABLE, 1
-
-PORTB_PD = 0x0304
-> B0, 0, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> B1, 1, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> B2, 2, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> B3, 3, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> B4, 4, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> B5, 5, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> B6, 6, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> B7, 7, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> B8, 8, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> B9, 9, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> B10, 10, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> B11, 11, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> B12, 12, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> B13, 13, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> B14, 14, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> B15, 15, 1
-= DISABLE, 0
-= ENABLE, 1
-
-PORTC_PD = 0x0308
-> C0, 0, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> C1, 1, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> C2, 2, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> C3, 3, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> C4, 4, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> C5, 5, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> C6, 6, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> C7, 7, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> C8, 8, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> C9, 9, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> C10, 10, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> C11, 11, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> C12, 12, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> C13, 13, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> C14, 14, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> C15, 15, 1
-= DISABLE, 0
-= ENABLE, 1
-
-PORTA_OD = 0x0400
-> A0, 0, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> A1, 1, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> A2, 2, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> A3, 3, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> A4, 4, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> A5, 5, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> A6, 6, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> A7, 7, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> A8, 8, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> A9, 9, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> A10, 10, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> A11, 11, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> A12, 12, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> A13, 13, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> A14, 14, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> A15, 15, 1
-= DISABLE, 0
-= ENABLE, 1
-
-PORTB_OD = 0x0404
-> B0, 0, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> B1, 1, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> B2, 2, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> B3, 3, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> B4, 4, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> B5, 5, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> B6, 6, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> B7, 7, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> B8, 8, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> B9, 9, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> B10, 10, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> B11, 11, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> B12, 12, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> B13, 13, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> B14, 14, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> B15, 15, 1
-= DISABLE, 0
-= ENABLE, 1
-
-PORTC_OD = 0x0408
-> C0, 0, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> C1, 1, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> C2, 2, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> C3, 3, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> C4, 4, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> C5, 5, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> C6, 6, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> C7, 7, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> C8, 8, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> C9, 9, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> C10, 10, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> C11, 11, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> C12, 12, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> C13, 13, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> C14, 14, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> C15, 15, 1
-= DISABLE, 0
-= ENABLE, 1
-
diff --git a/hardware/dp32g030/saradc.def b/hardware/dp32g030/saradc.def
deleted file mode 100644
index 42f4187b..00000000
--- a/hardware/dp32g030/saradc.def
+++ /dev/null
@@ -1,132 +0,0 @@
-# Copyright 2023 Dual Tachyon
-# https://github.com/DualTachyon
-#
-# Licensed under the Apache License, Version 2.0 (the "License");
-# you may not use this file except in compliance with the License.
-# You may obtain a copy of the License at
-#
-#     http://www.apache.org/licenses/LICENSE-2.0
-#
-# Unless required by applicable law or agreed to in writing, software
-# distributed under the License is distributed on an "AS IS" BASIS,
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-# See the License for the specific language governing permissions and
-# limitations under the License.
-
-[SARADC]
-@ = 0x400BA000, 0x800
-
-CFG = 0x0000
-> CH_SEL, 0, 15
-
-> AVG, 16, 2
-= 1_SAMPLE, 0
-= 2_SAMPLE, 1
-= 4_SAMPLE, 2
-= 8_SAMPLE, 3
-
-> CONT, 18, 1
-= SINGLE, 0
-= CONTINUOUS, 1
-
-> SMPL_SETUP, 19, 3
-= 1_CYCLE, 0
-= 2_CYCLE, 1
-= 4_CYCLE, 2
-= 8_CYCLE, 3
-= 16_CYCLE, 4
-= 32_CYCLE, 5
-= 64_CYCLE, 6
-= 128_CYCLE, 7
-
-> MEM_MODE, 22, 1
-= FIFO, 0
-= CHANNEL, 1
-
-> SMPL_CLK, 23, 1
-= EXTERNAL, 0
-= INTERNAL, 1
-
-> SMPL_WIN, 24, 3
-= 1_CYCLE, 0
-= 3_CYCLE, 1
-= 5_CYCLE, 2
-= 7_CYCLE, 3
-= 9_CYCLE, 4
-= 11_CYCLE, 5
-= 13_CYCLE, 6
-= 15_CYCLE, 7
-
-> ADC_EN, 27, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> ADC_TRIG, 28, 1
-= CPU, 0
-= EXTERNAL, 1
-
-> DMA_EN, 29, 1
-= DISABLE, 0
-= ENABLE, 1
-
-START = 0x0004
-> START, 0, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> SOFT_RESET, 2, 1
-= ASSERT, 0
-= DEASSERT, 1
-
-IE = 0x0008
-> CHx_EOC, 0, 16
-= NONE, 0x0000
-= ALL, 0xFFFF
-
-> FIFO_FULL, 16, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> FIFO_HFULL, 17, 1
-= DISABLE, 0
-= ENABLE, 1
-
-IF = 0x000C
-> CHx_EOC, 0, 16
-
-> FIFO_FULL, 16, 1
-= NOT_SET, 0
-= SET, 1
-
-> FIFO_HFULL, 17, 1
-= NOT_SET, 0
-= SET, 1
-
-CH0 = 0x0010
-
-EXTTRIG_SEL = 0x00B0
-
-CALIB_OFFSET = 0x00F0
-> OFFSET, 0, 8
-> VALID, 16, 1
-= NO, 0
-= YES, 1
-
-CALIB_KD = 0x00F4
-> KD, 0, 8
-> VALID, 16, 1
-= NO, 0
-= YES, 1
-
-[ADC_CHx]
-$ = ADC_Channel_t
-
-STAT = 0x0000
-> EOC, 0, 1
-= NOT_COMPLETE, 0
-= COMPLETE, 1
-
-DATA = 0x0004
-> DATA, 0, 12
-> NUM, 12, 4
-
diff --git a/hardware/dp32g030/spi.def b/hardware/dp32g030/spi.def
deleted file mode 100644
index f5a86291..00000000
--- a/hardware/dp32g030/spi.def
+++ /dev/null
@@ -1,124 +0,0 @@
-# Copyright 2023 Dual Tachyon
-# https://github.com/DualTachyon
-#
-# Licensed under the Apache License, Version 2.0 (the "License");
-# you may not use this file except in compliance with the License.
-# You may obtain a copy of the License at
-#
-#     http://www.apache.org/licenses/LICENSE-2.0
-#
-# Unless required by applicable law or agreed to in writing, software
-# distributed under the License is distributed on an "AS IS" BASIS,
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-# See the License for the specific language governing permissions and
-# limitations under the License.
-
-[SPI]
-$ = SPI_Port_t
-
-CR = 0x0000
-> TF_CLR, 16, 1
-> RF_CLR, 15, 1
-> TXDMAEN, 14, 1
-> RXDMAEN, 13, 1
-
-> MSR_SSN, 12, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> CPHA_DATA_HOLD_S, 8, 4
-> LSB, 7, 1
-> MSTR, 6, 1
-> CPOL, 5, 1
-> CPHA, 4, 1
-
-> SPE, 3, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> SPR, 0, 3
-= FPCLK_DIV_4, 0
-= FPCLK_DIV_8, 1
-= FPCLK_DIV_16, 2
-= FPCLK_DIV_32, 3
-= FPCLK_DIV_64, 4
-= FPCLK_DIV_128, 5
-= FPCLK_DIV_256, 6
-= FPCLK_DIV_512, 7
-
-WDR = 0x0004
-RDR = 0x0008
-
-IE = 0x0010
-> RXFIFO_OVF, 0, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> RXFIFO_FULL, 1, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> RXFIFO_HFULL, 2, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> TXFIFO_EMPTY, 3, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> TXFIFO_HFULL, 4, 1
-= DISABLE, 0
-= ENABLE, 1
-
-IF = 0x0014
-FIFOST = 0x0018
-> RFE, 0, 1
-= NOT_EMPTY, 0
-= EMPTY, 1
-
-> RFF, 1, 1
-= NOT_FULL, 0
-= FULL, 1
-
-> RFHF, 2, 1
-= NOT_HALF_FULL, 0
-= HALF_FULL, 1
-
-> TFE, 3, 1
-= NOT_EMPTY, 0
-= EMPTY, 1
-
-> TFF, 4, 1
-= NOT_FULL, 0
-= FULL, 1
-
-> TFHF, 5, 1
-= NOT_HALF_FULL,                   0
-= HALF_FULL,                       1
-
-> RF_LEVEL, 6, 3
-= 0_BYTE, 0
-= 1_BYTE, 1
-= 2_BYTE, 2
-= 3_BYTE, 3
-= 4_BYTE, 4
-= 5_BYTE, 5
-= 6_BYTE, 6
-= 7_BYTE, 7
-
-> TF_LEVEL, 9, 3
-= 0_BYTE, 0
-= 1_BYTE, 1
-= 2_BYTE, 2
-= 3_BYTE, 3
-= 4_BYTE, 4
-= 5_BYTE, 5
-= 6_BYTE, 6
-= 7_BYTE, 7
-
-[SPI0]
-@ = 0x400B8000, 0x800, $SPI
-
-[SPI1]
-@ = 0x400B8800, 0x800, $SPI
-
diff --git a/hardware/dp32g030/syscon.def b/hardware/dp32g030/syscon.def
deleted file mode 100644
index 7587e0ca..00000000
--- a/hardware/dp32g030/syscon.def
+++ /dev/null
@@ -1,178 +0,0 @@
-# Copyright 2023 Dual Tachyon
-# https://github.com/DualTachyon
-#
-# Licensed under the Apache License, Version 2.0 (the "License");
-# you may not use this file except in compliance with the License.
-# You may obtain a copy of the License at
-#
-#     http://www.apache.org/licenses/LICENSE-2.0
-#
-# Unless required by applicable law or agreed to in writing, software
-# distributed under the License is distributed on an "AS IS" BASIS,
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-# See the License for the specific language governing permissions and
-# limitations under the License.
-
-[SYSCON]
-@ = 0x40000000, 0x800
-
-CLK_SEL = 0x0000
-> SYS, 0, 1
-= RCHF, 0
-= DIV_CLK, 1
-
-> DIV, 1, 3
-= 1, 0
-= 2, 1
-= 4, 2
-= 8, 3
-= 16, 4
-= 32, 5
-
-> SRC, 4, 3
-= RCHF, 0
-= RCLF, 1
-= XTAH, 2
-= XTAL, 3
-= PLL, 4
-
-> W_PLL, 7, 1
-= RCHF, 0
-= XTAH, 1
-
-# The documentation doesn't match the firmware!
-> R_SARADC_SMPL, 9, 2
-= DIV1, 0
-= DIV2, 1
-= DIV4, 2
-= DIV8, 3
-
-> W_SARADC_SMPL, 10, 2
-= DIV1, 0
-= DIV2, 1
-= DIV4, 2
-= DIV8, 3
-
-> R_PLL, 11, 1
-= RCHF, 0
-= XTAH, 1
-
-DIV_CLK_GATE = 0x0004
-> DIV_CLK_GATE, 0, 1
-= DISABLE, 0
-= ENABLE, 1
-
-DEV_CLK_GATE = 0x0008
-> GPIOA, 0, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> GPIOB, 1, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> GPIOC, 2, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> IIC0, 4, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> IIC1, 5, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> UART0, 6, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> UART1, 7, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> UART2, 8, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> SPI0, 10, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> SPI1, 11, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> TIMER_BASE0, 12, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> TIMER_BASE1, 13, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> TIMER_BASE2, 14, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> TIMER_PLUS0, 15, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> TIMER_PLUS1, 16, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> PWM_BASE0, 17, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> PWM_BASE1, 18, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> PWM_PLUS0, 20, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> PWM_PLUS1, 21, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> RTC, 22, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> IWDT, 23, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> WWDT, 24, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> SARADC, 25, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> CRC, 27, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> AES, 28, 1
-= DISABLE, 0
-= ENABLE, 1
-
-RC_FREQ_DELTA = 0x0078
-> RCLF_DELTA, 0, 10
-> RCLF_SIG, 10, 1
-> RCHF_DELTA, 11, 20
-> RCHF_SIG, 31, 1
-
-VREF_VOLT_DELTA = 0x007C
-
-CHIP_ID0 = 0x0080
-CHIP_ID1 = 0x0084
-CHIP_ID2 = 0x0088
-CHIP_ID3 = 0x008C
-
diff --git a/hardware/dp32g030/uart.def b/hardware/dp32g030/uart.def
deleted file mode 100644
index cf8f79ad..00000000
--- a/hardware/dp32g030/uart.def
+++ /dev/null
@@ -1,230 +0,0 @@
-# Copyright 2023 Dual Tachyon
-# https://github.com/DualTachyon
-#
-# Licensed under the Apache License, Version 2.0 (the "License");
-# you may not use this file except in compliance with the License.
-# You may obtain a copy of the License at
-#
-#     http://www.apache.org/licenses/LICENSE-2.0
-#
-# Unless required by applicable law or agreed to in writing, software
-# distributed under the License is distributed on an "AS IS" BASIS,
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-# See the License for the specific language governing permissions and
-# limitations under the License.
-
-[UART]
-$ = UART_Port_t
-
-CTRL = 0x0000
-> UARTEN, 0, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> RXEN, 1, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> TXEN, 2, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> RXDMAEN, 3, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> TXDMAEN, 4, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> NINEBIT, 5, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> PAREN, 6, 1
-= DISABLE, 0
-= ENABLE, 1
-
-BAUD = 0x0004
-TDR = 0x0008
-RDR = 0x000C
-
-IE = 0x0010
-> TXDONE, 2, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> PARITYE, 3, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> STOPE, 4, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> RXTO, 5, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> RXFIFO, 6, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> TXFIFO, 7, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> RXFIFO_OVF, 8, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> ABRD_OVF, 9, 1
-= DISABLE, 0
-= ENABLE, 1
-
-IF = 0x0014
-> TXDONE, 2, 1
-= NOT_SET, 0
-= SET, 1
-
-> PARITYE, 3, 1
-= NOT_SET, 0
-= SET, 1
-
-> STOPE, 4, 1
-= NOT_SET, 0
-= SET, 1
-
-> RXTO, 5, 1
-= NOT_SET, 0
-= SET, 1
-
-> RXFIFO, 6, 1
-= NOT_SET, 0
-= SET, 1
-
-> TXFIFO, 7, 1
-= NOT_SET, 0
-= SET, 1
-
-> RXFIFO_OVF, 8, 1
-= NOT_SET, 0
-= SET, 1
-
-> ABRD_OVF, 9, 1
-= NOT_SET, 0
-= SET, 1
-
-> RXFIFO_EMPTY, 10, 1
-= NOT_SET, 0
-= SET, 1
-
-> RXFIFO_FULL, 11, 1
-= NOT_SET, 0
-= SET, 1
-
-> RXFIFO_HFULL, 12, 1
-= NOT_SET, 0
-= SET, 1
-
-> TXFIFO_EMPTY, 13, 1
-= NOT_SET, 0
-= SET, 1
-
-> TXFIFO_FULL, 14, 1
-= NOT_SET, 0
-= SET, 1
-
-> TXFIFO_HFULL, 15, 1
-= NOT_SET, 0
-= SET, 1
-
-> TXBUSY, 16, 1
-= NOT_SET, 0
-= SET, 1
-
-> RF_LEVEL, 17, 3
-= 0_8_BYTE, 0
-= 1_BYTE, 1
-= 2_BYTE, 2
-= 3_BYTE, 3
-= 4_BYTE, 4
-= 5_BYTE, 5
-= 6_BYTE, 6
-= 7_BYTE, 7
-
-> TF_LEVEL, 20, 3
-= 0_8_BYTE, 0
-= 1_BYTE, 1
-= 2_BYTE, 2
-= 3_BYTE, 3
-= 4_BYTE, 4
-= 5_BYTE, 5
-= 6_BYTE, 6
-= 7_BYTE, 7
-
-FIFO = 0x0018
-> RF_LEVEL, 0, 3
-= 1_BYTE, 0
-= 2_BYTE, 1
-= 3_BYTE, 2
-= 4_BYTE, 3
-= 5_BYTE, 4
-= 6_BYTE, 5
-= 7_BYTE, 6
-= 8_BYTE, 7
-
-> TF_LEVEL, 3, 3
-= 0_BYTE, 0
-= 1_BYTE, 1
-= 2_BYTE, 2
-= 3_BYTE, 3
-= 4_BYTE, 4
-= 5_BYTE, 5
-= 6_BYTE, 6
-= 7_BYTE, 7
-
-> RF_CLR, 6, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> TF_CLR, 7, 1
-= DISABLE, 0
-= ENABLE, 1
-
-FC = 0x001C
-> CTSEN, 0, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> RTSEN, 1, 1
-= DISABLE, 0
-= ENABLE, 1
-
-> CTSPOL, 2, 1
-= LOW, 0
-= HIGH, 1
-
-> RTSPOL, 3, 1
-= LOW, 0
-= HIGH, 1
-
-> CTS_SIGNAL, 4, 1
-= LOW, 0
-= HIGH, 1
-
-> RTS_SIGNAL, 5, 1
-= LOW, 0
-= HIGH, 1
-
-RXTO = 0x0020
-
-[UART0]
-@ = 0x4006B000, 0x800, $UART
-
-[UART1]
-@ = 0x4006B800, 0x800, $UART
-
-[UART2]
-@ = 0x4006C000, 0x800, $UART
-